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Aldec Active HDL 8.3 SP1

Aldec Active HDL 8.3 SP1
2011 | ENG | 634 MB


Fully integrated development environment digital device, built on the core logic simulation, which supports text and graphic input projects to a mixture of languages, VHDL, Verilog, EDIF, SystemC, SystemVerilog.

About Aldec Inc.
Aldec company founded in 1984 by Dr. Stanley Hayduk, to develop software and hardware for computer-aided design of microelectronics. The headquarters of the firm is located in Henderson (NV), USA, with offices in Canada, Japan, Poland and Ukraine.

About Active-HDL
System Design Active-HDL is today a leading development environment for building projects and their modeling for all the families of programmable integrated circuits FPGA, providing flexibility of the approach and providing advanced features to support the most advanced and sophisticated projects. Design environment Active-HDL provides developers with the independence to use other design tools from a single, fully integrated environment.

Tight integration of all applications provides absolute control over the project from specification all the way to its physical implementation. Active-HDL also has interfaces with all leading software products, giving developers the freedom to use those design tools that best meet the requirements of each project.

System of Active-HDL structure is built around its route control unit design, which allows users to easily access design tools and libraries that they use in the project. Active-HDL also comes with all the libraries of FPGA manufacturers who are already precompiled and ready to use in their projects. Block Project Management Active-HDL allows a developer to perform all the modifications and operations on the project from a single environment, such integration provides better control over the design process and saves time by eliminating the need to run multiple windows interface and processes.

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